1. Field of the Invention
The present invention relates generally to circuits and methods in integrated circuits, and more specifically to circuits and methods for reducing the effects of crosstalk noise in integrated circuits.
2. Description of the Prior Art
As integrated circuits (ICs) become faster, smaller, and more complex, signal lines in the integrated circuit are carrying high-speed signals in densely routed circuits where the conditions are ideal for producing crosstalk noise. Crosstalk occurs when a signal from one conductor leaks to another. Strong crosstalk noise can be generated because of tight electrical coupling of two or more signal lines in a high-speed and high-density application.
Crosstalk is induced through three coupling mechanisms: capacitive, inductive, and radiative. Capacitive coupling occurs when conductors are so close that the capacitance becomes large enough to couple significant energy from one line to another. Most of the wire capacitance is to parallel neighboring wires in the same layer, where wires can be routed side-by-side on a semiconductor wafer for relatively long distances. Inductive coupling occurs when two signal lines are coupled by mutual inductance. Radiative coupling is essentially a self-induced electromagnetic interference (EMI) disturbance.
In current deep submicron integrated circuit manufacturing technologies, a large percentage of the total capacitance of a wire is the capacitance of coupling to other conductors. This coupling can lead to large spikes being induced on victim lines when an aggressor line switches. The spikes are particularly severe when two lines run adjacent to each other for long distances, as occurs when buses are routed.
Crosstalk is deleterious to integrated circuits for several reasons. First, the induced spike can sometime cause a gate on the victim line to flip or change logical states. This leads to functional faults in dynamic logic circuits. In static logic circuits, such glitches can induce new, longer critical paths in the design, slowing down the function of the part.
Second, even if the gate on the victim line does not flip, it can slow down a signal that is transitioning in the opposite direction from the induced spike on the victim line. This is because the gate driving the victim line needs more time to remove the induced charge from the crosstalk pulse. With process scaling, crosstalk will become a more serious problem as a greater proportion of a line's capacitance comes from coupling with other conductors.
FIG. 1 illustrates a known solution for reducing crosstalk noise on coupled lines by inserting inverters between the coupled lines. In this solution, inverters 40 are placed between cross coupled lines so that if a voltage on aggressor line 20 is rising, the coupled victim line 26 will be pulled down, and vice versa. This technique reduces the size of the voltage spike due to crosstalk.
The solution shown in FIG. 1 has its disadvantages, however, as the inverters consume power whenever aggressor line 20 and victim line 26 are at the same logic value. If the aggressor and victim lines are driven by domino cells, lines are at the same voltage during every cycle when the gates are in precharge. Additionally, cross coupled inverters 40 can increase the delay for a line to switch since they form a feedback loop that needs to be overcome whenever a line changes.
Other solutions used in industry to reduce coupling effects include passive schemes, such as shielding and greater line spacing. Both of the these techniques are effective, but they require additional area on the wafer, which increases the cost of the part. In addition, circuit blocks with a lot of wiring congestion may become unroutable if a large number of wires must have wider spacing or shielding. This is because shielding and spacing both require extra routing tracks. For a long, wide bus, in particular, shielding or spacing every line from every other one would consume a large area on the wafer.
Another approach for reducing crosstalk uses simultaneous redundant switching on an extra conductor. This approach also has an area penalty, which may make it unsuitable for some designs.
Therefore, it should be apparent that there is a need for an improved method and apparatus that reduces the effects of crosstalk noise, consumes less power, has a small speed penalty for signal propagation, requires a smaller area on the wafer, and has performance similar to or greater than shielding and increased line spacing.